This CAREER proposal addresses new paradigms for exploiting and teaching instruction-level parallelism (ILP). Statically-scheduled microarchitectures achieve high performance by relegating to the compiler the responsibility for detecting and scheduling ILP. Drawbacks to this approach include a lack of object code compatibility between generations, the reliance on program profiles, and the erosion of the individual compilation model. This research will develop new paradigms for ILP that remove the draw-backs by enlisting the OS, the linker, the assembler, the instruction encoding and the microarchitecture. The educational plan will introduce the compiler's role in the undergraduate curriculum as the sophomore and senior levels by developing two courses: "Introduction to Machine Language Programming" will be modified to include an awareness of performance issues and the role of the compiler; and a senior level course will be developed to teach back-end ILP compiler optimization. An important feature of this proposal is the training of graduate students in a fundamentally and technologically significant area of ILP. The research and educational activities will use the TINKER Instruction Set Architecture that has been constructed by the principal investigator and his students.
