A major research area, one evolving out of the principal investigator's long-term work in nonlinear circuit theory, is the development of a rigorous stability theory for the operating points of dc transistor circuits. A complete solution (necessary and sufficient conditions for dc operating point stability in nonlinear circuits) seems almost within grasp, and this research project seeks to obtain it. Research on low-power circuits encompasses the design of new low- power clock buffers, schemes for implementing circuits to achieve charge recovery on a databus and the investigation of techniques for the design of low-power practical circuits such as Viterbi decoders for CDMA digital cellular applications. Another project concerns the development of new techniques for multiplierless digital filter design, including the design of novel multiplierless adaptive filters. Work will continue on new techniques for IIR filter pipelining, a topic that shows great promise in providing more economical structures (in terms of lower power-dissipation and IC-area requirements) for DSP systems. In addition, research will continue in the area of video compression, where a technique for rate-distortion optimization is being developed. Finally, recent circuit design experience has made evident the need for advances in logic simulation. The principal investigator's research has already produced several simple ways to improve simulation efficiency and it is expected that major improvements will be forthcoming through further vigorous pursuit of this project
