This research is on adiabatic logic design for very low energy consumption circuits and systems. The primary idea is to use principles of adiabatic switching as the basis for circuit design. Energy recovery using this notion is a relatively new idea, although the concept of reversible logic and zero-energy computing can be tracked back to he early 1970s, the attempt to realize the concept in electronic circuits is a new endeavor. An adiabatic logic, using both fully reversible and partially reversible logic, is being developed. It is based on standard CMOS technology with a switching power supply. Basic logic gates, registers, and memories for recovered energy operations, are being developed. Tools for power management, such as techniques to utilize the redundant signals generated from reversible logic gates, are being developed. The newly designed circuits and the corresponding power supply are being fabricated and tested.

Agency
National Science Foundation (NSF)
Institute
Division of Computer and Communication Foundations (CCF)
Type
Standard Grant (Standard)
Application #
9633516
Program Officer
Robert B Grafton
Project Start
Project End
Budget Start
1996-05-01
Budget End
1997-10-31
Support Year
Fiscal Year
1996
Total Cost
$45,146
Indirect Cost
Name
Purdue Research Foundation
Department
Type
DUNS #
City
West Lafayette
State
IN
Country
United States
Zip Code
47907