This research is on design methodologies for low power VLSI design. Research activities include the following. First, developing an understanding of low-power I/O encodings and their application to practical problems. The approach is to obtain new practical Limited-Weight codes, and extend low-power coding methods to other data distributions (e.g. Gaussian data) and to other bus models (e.g. with cross-coupled capacitance). Second, extending a locally developed prototyping tool to system-level power estimation, and developing a prototyping test-bed for validating theoretical advances and as an education tool. Finally, an exploration of implementing low-power codes in real applications is being undertaken with industrial partners in order to improve the practical relevance of theoretical results.
