Asynchronous designs are an attractive alternative to synchronous designs due to their lack of clock skew problems, potential for average-case delays, adaptability to physical properties, and power savings. This project focuses on techniques for performance-analysis and performance- driven synthesis that together can facilitate the design of high-performance asynchronous circuits. For performance analysis, the investigator is exploring analytical and simulation-based analysis techniques that can guide architectural design as well as guide controller synthesis tools to optimize for user-specified system performance metrics. For synthesis, the research is leveraging off an existing technology mapping tool that uses minimal system information to identify and then optimize common transitions. By increasing the amount of system information available, selected critical transitions can be optimized. In these designs common transitions need not be critical and critical

Agency
National Science Foundation (NSF)
Institute
Division of Computer and Communication Foundations (CCF)
Application #
9812164
Program Officer
John Cozzens
Project Start
Project End
Budget Start
1998-07-15
Budget End
2001-12-31
Support Year
Fiscal Year
1998
Total Cost
$340,872
Indirect Cost
Name
University of Southern California
Department
Type
DUNS #
City
Los Angeles
State
CA
Country
United States
Zip Code
90089