Graphene, a single sheet of carbon atoms arranged in a honey-comb lattice, possesses many novel properties, such as ballistic electron transport at room temperature and micron-scale coherence lengths. Moreover, its planar nature makes it much more amenable to integration into thin-film based technologies such as integrated circuit fabrication. This reseach aims to develop a novel synthesis and scale-up process and nondestructive wafer-level metrology scheme for device-enabling epitaxial graphene substrates. The approach is based on SiC thin film epitaxially grown on Si wafers. The heteroepitaxial SiC film is subsequently used to create the graphene layer. The advantages of this scheme include: i) highly uniform and reproducible SiC films are used as the starting material; ii) the process is scalable to large-area wafers and much more cost effective since the films are batch deposited on Si wafers (rather than SiC substrates).

The broader impact of the research lies in its promise to develop a scalable process for producing epitaxial graphene sheets with high quality and reproducibility, and in principle, over a large area. These in turn will enable the full utilization of graphene's extraordinary properties in such applications as ultra-high speed, ultra-low power electronics and robust highly sensitive chemical and electrochemical sensors. Additional significant impact will be on human resource development and outreach activities, including training of students and dissemination of the results in the archival literature and through talks given to the general public by the PI.

Project Start
Project End
Budget Start
2008-07-01
Budget End
2012-06-30
Support Year
Fiscal Year
2008
Total Cost
$328,381
Indirect Cost
Name
University of California Berkeley
Department
Type
DUNS #
City
Berkeley
State
CA
Country
United States
Zip Code
94704