This research focuses on developing a methodology for solving a problem of significant industrial relevance in electronics manufacturing. Foremost is the realization of the need to solve complex group scheduling problems in two- and three-stage printed circuit board (PCB) assembly systems. It considers the interaction between external setup (kitting) times and internal (machine) setup times with carryover sequence dependency, along with machine run (placement) times. A variety of performance measures, namely the minimization of makespan, sum of the flow times/weighted flow times, and sum of the weighted tardiness will be considered to meet the operational needs of various PCB manufacturers. The emphasis is on the development of scheduling models that truly reflect real operational constraints. A novel, linear mathematical modeling framework that focuses on blending two different modeling paradigms will be developed: conventional precedence relationships for the sequence of board types in each group, and ?slots? for assigning each slot to a board group. The model, although compact, could involve a huge number of binary variables. To combat this difficulty, mechanisms based on branch and price methods will be used to identify an effective lower bound for the original research problem, which in turn will be used in the search algorithm to evaluate its effectiveness as a percentage deviation (PD).
This research will not only advance the knowledge through research on complex group scheduling problems, benefiting industry at large, but will also provide various PCB manufacturers with a methodological framework for rapidly generating schedules with guaranteed quantifiable performance. A PD of 3 percent or below is sought. Apart from methodological contributions, this research will train and educate graduate students by engaging them in scheduling research. The insightful research findings from this research will enrich the graduate courses on production planning and control, and scheduling.
