The research objectives of this EArly-concept Grants for Exploratory Research award are to validate a new concept in surface inspection of thin crystalline silicon wafers of the type used in photovoltaic manufacturing. The new high risk ideas involve the use of multiple capacitive sensors situated above a moving assembly line of vibrating silicon wafers and the electrical output of the sensors to be used to create electrostatic images of the surface, revealing cracks. This method of detecting cracks can be done rapidly and to high precision. The approach will be to design and build an assembly line that uses ultrasonic transport methods, build a linear array of capacitive (Kelvin) probes under which the wafers will move, and develop methods to use the electrical signals to create electrostatic surface maps of the wafers.
If successful, the benefits to society will be to make photovoltaics more acceptable and decrease the U.S. need for oil by providing a description of a silicon wafer inspection system that will be low cost and high throughput. This research will show how the cost of manufacturing photovoltaic devices using silicon wafers can be reduced, weeding out wafers that will fracture. The reliability of photovoltaic cells will increase, the module costs will decrease and the life of modules on commercial and residential rooftops will increase.
The research objectives of this project were to validate a new concept in surface inspection of thin crystalline silicon wafers of the type used in photovoltaic manufacturing with electrostatic imaging technique (Kelvin probes) to reveal surface cracks. A wafer scanning system consisting of multiple probes, Kelvin probe sensors (vibrating and non-vibrating) and a fiber optic sensor, with a scanning dimension up to 8 inch square, was successfully designed and built from this award, as shown in Fig.1. The wafer scanning system allows for measuring and inspecting silicon wafers and cells under different illumination conditions. A variety of silicon wafers and cells were tested, which indicated the detectability of crack from surface potential maps. Examples of the surface potential maps for both single crystalline silicon cells and multicrystalline silicon cells are presented here. A good cells shows a uniform surface potential, but a crack on a surface will cause the surface potential decrease. Delta surface potential derived from light and dark condition can further display the difference of a good and a poor cell. The cell without micro-cracks has a much higher delta surface potential than the cells with the micro-cracks. Micro-cracks on the cells behave like a shunting spot, which drains the current. A potential gradient towards the micro-cracks is also visible in the surrounding area. High delta surface potential and low surface band bending are expected to contribute to the high conversion efficiency on a cell. There are four publication and two patent disclosures from this award. Yang, C. Pyekh, Y. and Danyluk, S., Surface Potential Imaging of PV Cells with a Kelvin Probe, Solar Energy Materials & Solar Cells, Vol. 102, 2012, pp. 167-172. Yang, C. and Danyluk, S., A Multi-Purpose Wafer Scanning System for PV Inspection, The 38th IEEE Photovoltaic Specialists Conference, Austin, TX, USA. June 3-8, 2012, Yang, C. Pyekh, Y. and Danyluk, S., Crack Induced Surface Potential Variation on Si PV Cells, 37th IEEE Photovoltaic Specialists Conference, Seattle, WA, June 19-24, 2011 Yang, C. Pyekh, Y. and Danluk, S., A new metrology system for high speed, high throughput inspection of PV wafer/cell cracks, the 2011 NSF Engineering Research and Innovation Conference, Atlanta, GA, January 4-7, 2011.
