This grant provides funding for basic studies into fundamental techniques for enabling a generalized microchip assembly process. The research strategy is to learn from industrial xerography printing, which electrostatically assembles ~108 charge toner particles on a sheet of paper in <1 sec for under 1 cent/page. Viewed as an assembly technology, xerography is a million times faster than state of the art robotic pick and place. This work will explore, through modeling and experimentation, how best to place charge on generic microchips and then use dynamic electric fields to orient and transport the chips into position.

If successful, the results of this research could guide the future design of a generalized manufacturing tool for bridging the gap between optimized nanoscale devices and meso/macroscopic systems. The long term vision is to enable a "printer" where the "ink" is high performance prefabricated active devices and the "paper image output" is a large area functional system, not possible with existing manufacturing techniques. Ink examples include nanotube/nanowire based sensors, other functional devices with nano composition, low noise amplifiers, light sources, high speed circuit chips with submicron features or ceramic blocks. Functional system examples include nano based sensor arrays, high performance flexible electronics, phased arrays (metamaterials), new thermoelectric composites, or smart paper.

Project Report

This grant enabled a study on ways to move micro objects with electric fields, laying the foundation for a new way to make electronic systems with printing. We leveraged xerographic printing concepts (similar to laser printers) to develop a process to make computer chips act like toner (charged particles) and assemble the chips (like printing an image). A semiconductor process was developed using thin film technology to convert wafers of silicon chips into small chips. Each chip has a charge pattern on the chip. The computer chips are immersed in a fluid like ink (see image). A system was built to enable a computer to control the electric field pattern on a surface, varying the field in time and space. The dynamic electric fields are programmed to orient and assemble the chips. Random, decaying and pattern matched fields are used. Experimental tests were peformed to determine optimal field patterns for moving the chips to precise locations. In the future, we hope to use this approach to study the fundamentals of mesoscale assembly. When combined with chip transfer and wiring, the approach enables computer circuits to be fabricated. Different kinds of cihps ("ink") could be printed, potentially enabling thousands to millions of chips to be assembled in parallel. Eventually this concept can be developed into a new printer tehnology for making new kinds of complex electronics systems, such as new medical imaging, antenna, sensor and display systems.

Project Start
Project End
Budget Start
2011-05-01
Budget End
2014-04-30
Support Year
Fiscal Year
2011
Total Cost
$405,000
Indirect Cost
Name
Palo Alto Research Center Incorporated
Department
Type
DUNS #
City
Palo Alto
State
CA
Country
United States
Zip Code
94304