System-Level Approaches to Reducing Energy Consumption in Real-Time Embedded System Design
Power-manageable hardware devices are essential for reducing system energy consumption. In order to benefit maximally from such devices, new and innovative approaches must be developed to fully exploit the dynamically adjustable power v.s. delay characteristics. The proposed research aims at developing techniques employed at the system level to reduce energy consumption in battery-powered real-time embedded systems composed of power-manageable hardware resources. This project strives to obtain a fundamental understanding on the effect of power-manageable resources on both performance and energy consumption during the execution of real-time tasks. Non-ideal features of real-world power-manageable devices will be considered.
The major activities include i) devising high-level allocation and scheduling schemes for systems composed of power-manageable devices, ii) designing and analyzing voltage scheduling algorithms for variable-voltage processors, and iii) developing techniques to predict power/energy consumed by hardware resources at the micro-architectural level. Training students to prepare them for energy-conscious design challenges is also a major component of the project, which will be achieved through course development and active involvements of both undergraduate and graduate students in the research.