Moore's law based doubling of transistor counts and decreasing feature sizes have resulted in a phenomenal increase in performance at the expense of an exponential increase in power consumption and consequently, heat generation. Scaling according to Moore's law cannot continue unless system-level solutions for power and thermal management are developed. Existing techniques for system-level power optimization including dynamic power management (DPM) and dynamic voltage frequency scaling (DVFS) operate in a piece-meal fashion and are sub-optimal in general. Thermal management schemes, to date, are also fairly simple and do not interact with DPM or DVFS policies that control the power consumption and therefore heat generation.
This research will provide a unified framework for energy and thermal management of multi-component computing platforms. The framework will be built around optimal analytical solutions to generic problem formulations that will be applicable at multiple levels of computing system abstraction. The abstraction levels will include board level, multi-processor system-on-chip level and micro-architecture pipeline level. The energy and thermal management strategies developed here will reduce the packaging and cooling costs and increase the lifetime of all computing systems -- from portable devices to high performance desktops to servers. Furthermore, this research will train students in the diverse fields of energy management of microelectronic systems and thermal management of electronic and non-electronic components.
