The persistent drive for increased performance and the contradictory need to reduce power consumption pose serious challenges to the advancement of embedded computing. Reconfigurable computing answers these by providing a flexible medium for hardware-based execution. Compute-intensive sections of application code are implemented in reconfigurable hardware, such as field-programmable gate arrays (FPGAs), to accelerate the application, reduce its power requirements, or both. A traditional microprocessor executes application parts not implemented in hardware, providing a mixed software/hardware execution model. However, unlike traditional custom hardware, the actual functionality of reconfigurable hardware is changeable during execution to implement different hardware functions within and across applications. The performance and power benefits of hardware implementation are therefore complemented by the flexibility to address computing needs that change over time, where that time-span may be measured in days, seconds, or even microseconds. Reconfigurable computing is therefore a powerful and compelling computing paradigm for future embedded computing.
This project addresses one of the key barriers to the use of reconfigurable computing in mainstream embedded devices: the lack of systems software support appropriate to modern multi-tasking multi-threaded embedded systems. In this research, the project is developing OS-level techniques to schedule and allocate reconfigurable hardware between multiple executing threads and processes in order to achieve the best overall system-level performance and power-savings. Scheduling topics under investigation include: dynamic binding of compute-intensive functions to hardware or software, choosing between different hardware implementations targeting different area/performance/power tradeoffs, adaptive scheduling based on changing system loads, and predictive pre-fetching of hardware functions. With powerful run-time scheduling algorithms, embedded devices of the future will reap the full potential of reconfigurable computing.
