Circuits implemented using field-programmable gate arrays (FPGAs) share many of the same advantages of software solutions and provide a complimentary technology for increasing system performance of reducing power. Implementing critical kernels of a software application within an FPGA can provide substantial speedups in application execution time. However, traditional hardware/software partitioning approaches either require extensive manual efforts or rely on automated partitioning compilers that significantly depart from mainstream software development tools and practices. This CAREER project seeks to overcome these challenges by investigating and developing new methods for dynamically translating kernels within an executing application binary into circuits executing on an FPGA ? a process referred to as warp processing. Warp processing provides an innovative technology that allows FPGAs to be readily integrated into computing systems without requiring hardware design expertise, specialized tools, or even knowledge of the FPGA. This CAREER project will investigate several interrelated research problems, including: 1) dynamic application profiling, 2) dynamic optimization of multitasked applications, 3) adaptable fixed point representations for efficient support of floating point arithmetic in hardware circuits, and 4) low-power warp processing. This CAREER project also seeks to significantly improve embedded systems education through several concerted efforts aimed at training engineers to understand the fundamental similarities and differences between software and hardware implementations and enable those engineers to apply that knowledge to evaluate the tradeoffs between alternative design solutions.
