Computer systems security is an arms race between defenders and attackers that has mainly been confined to software technologies. Increases in the complexity of hardware and the rising number of transistors per chip have created opportunities for hardware-based security threats. Among the most pernicious are malicious hardware footholds inserted at design time, which an attacker can use as the basis of a computer system attack.
This project explores of the feasibility of foothold attacks and a fundamental design-time methodology for defending against them. First, this project looks at techniques for highlighting potentially malicious circuits in a design automatically. The basic algorithm, called dead circuit identification (DCI), analyzes hardware description language source code and dynamic execution traces of design verification tests to identify suspicious circuitry whose results do not impact the computation.
The second aspect of this project is a system for removing suspicious circuits from a design automatically. The dead circuit elimination (DCE) tool removes suspicious circuits from a design by pushing potentially malicious logic up to a higher layer where it can be analyzed in more detail at runtime.
The third aspect of this project is a new technique for generating test cases and perturbing existing test cases to search specifically for potentially malicious circuits.
This project provides a pathway to detection and defense against security risks from hardware comprising attacks, making the enormous disruptions possible with such attacks far more difficult than today.
