Wide-scale deployment of wireless sensor networks has been hindered primarily by the inability to endure for long durations on small power sources. The focus of this project is on creating computationally efficient electronics to extend the lifetimes of wireless sensor nodes. Ultra-low-power analog circuitry is used to provide additional computational resources at each sensor node while simultaneously reducing the total power consumed. This project systematically addresses how to effectively use analog signal processing in a wide variety of wireless sensor network applications by investigating (1) the creation of modifiable, easy-to-use smart-sensor architectures for ultra-low-power computation, (2) continuous-time signal-processing approaches for event-detection systems (including biologically inspired processing), and (3) ultra-low-power memory storage and data conversion techniques.
The importance of this research is in providing the knowledge necessary to create drastically improved nodes for wireless sensor networks in terms of power consumption and computational ability. The same low-power design techniques can be used for a variety of other power-constrained applications such as consumer electronics and biomedical/implantable devices. Integrating education and outreach with the research of this project will lead to (1) close mentoring of undergraduate and graduate students in a team-centric environment, (2) cross-disciplinary coursework, and (3) high-school outreach activities to expose many new students, including those from underrepresented groups, to engineering and electronic systems.
