This project investigates operating system mechanisms to manage hardware accelerator resources in a safe, fair, and protected manner while maintaining high performance. Programmable vector processors including general-purpose graphical processing units (GP-GPUs) and other accelerators for encryption, compression, media transcoding, pattern matching, parsing, etc. are increasingly ubiquitous in computer systems. For the sake of safety and fairness, such accelerators must be managed by the operating system, but for the sake of performance, they must be accessible directly from user-level applications, without OS intervention. The conflict between these goals is exacerbated by the opacity of proprietary library/driver/hardware interfaces. This project seeks a balanced solution to these conflicting goals through: (1) an operating system resource management architecture that allows direct user-level access in the common case, but intercedes in the existing accelerator access path when necessary to delay and re-order requests; (2) a tool chain that uncovers hidden interface semantics required for resource management, together with a characterization of the information needed from vendors in the future; and (3) an integrated management and scheduling strategy across the full set of computational resources in a given system.
By focusing on safe, fair, and efficient access to computational accelerators, the project aims to increase performance and power efficiency over a broad range of applications critical to today's digital economy and society. Broad dissemination is promoted through implementation in the Linux kernel, and open-source software release. Technology transfer is pursued through regular communication and collaboration with GPU industry vendors. Project research is integrated with education through curricular development and graduate student instruction.
