Runtime power management (PM) is concerned with putting idle components of a computer system into power-saving modes while the system is still serving its user. Power management is increasingly important to the battery lifetime and thermal management of mobile systems whose computational heart, a system-on-a-chip (SoC), often integrates tens and hundreds of components and billions of transistors. Existing systems reply on device drivers for runtime PM. A device driver is a software program that controls a particular type of hardware device attached to a computer. This approach to PM not only leads to unoptimized, or often complete absence of runtime PM in widely used mobile systems, but also incurs high overhead by engaging the high-power central processing unit (CPU). The goal of this project is to relieve device drivers and the CPU of runtime PM by completely rethinking runtime PM of mobile SoCs. First, it will investigate a novel architecture in which a single operating system entity reasons whether a SoC component is idle without involving its device driver. Second, the project will contribute to operating system support such that the runtime PM logic can be entirely realized on an ultra-low-power computing core available in modern mobile systems. The project will prototype and evaluate its technical innovations with Android/Linux-based testbeds and Field-Programmable Gate Array (FPGA)-based SoC prototyping hardware.
The project will leverage collaborations with industry leaders to ensure a timely transfer of technologies into industry and a broad impact on the commercial development of mobile systems and their SoCs. The project will provide new modules for teaching mobile and embedded systems and a platform to engage high-school and minority students. As mobile systems are providing access to information technologies to underserved populations and being adopted for professional uses, by improving their battery lifetime and therefore usability, the project will have a positive socio-economic impact globally. Research results will be published in academic conferences and journals. Resulting hardware design, software, and data will be made open-source and freely available at a repository accessible from http://download.recg.org. This repository will be maintained at least five years after the project is completed.
This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
