The drive to develop advanced semiconductor devices and circuits is fueled by the wealth of electronic and optical properties of heterostructures made possible by band structure engineering. Tunnel diodes (TD) can be integrated with transistors to create novel quantum nonlinear functional devices and circuits due to the unique property of a tunnel diode's negative differential resistance (NDR). Such integrated circuits have demonstrated enhanced performances in circuit speed, reduce component count and lower power consumption. Previous circuit work incorporating TDs, at places like Motorola Laboratories, has been limited to III-V compound semiconductors only. However, until recently, it was not practical to translate this to the low-cost and high production volume Si world. But recent developments in Si-based TD technology by the PI and other researchers are challenging this roadblock. One aim of this proposal is to seek ways to integrate Si-based resonant interband tunnel diodes (RITD) with Si/SiGe transistors to meet the challenges in the wireless communications by transferring this III-V-based TD circuit technology to Si. The PI seeks to capitalize upon recent DC performance milestones achieved within his laboratory on Si-based RITDs, namely peak-to-valley current ratio (PVCR) up to 3.8 at room temperature or peak current densities Jp exceeding 150 kA/cm 2 .
This project aims to boost Si wireless capabilities that could eventually lead to an entire radio on a single Si chip or other interesting fusions of digital and analog circuits. Further, tunnel diodes have been shown to be very radiation hard and were used extensively in some of the first communication satellites in the 1960's, thus lending their introduction into military and non-terrestrial applications as well. Partnering with Motorola Laboratories in the form of a Grant Opportunities of Academia in Liaison with Industry (GOALI) is testimony to the level of interest and curiosity of industry to explore this technological pathway further, before embracing it. Motorola is willing to share their circuit and system experience as well as apply their in-house analog modeling of these nonlinear Si/SiGe TDs.
This project will provide an environment where students can be trained in a broader perspective of the research process, from device physics, material and device processing, to device and circuit testing and modeling. Collaborative efforts required in this project will allow graduate and undergraduate students not only to have natural exchange and supervision with PIs, but also to have strong interactions with scientists in government and industry research laboratories, which will facilitate their acquisition of knowledge and provide an initial research experience that promotes the notion of teaming in their future careers. At Ohio State (Berger), undergraduate research is expected to play a large component in the proposed research. Discussions have already commenced with the EE Honors Program representative and the PI to ramp up towards a collective REU Site submission in Fall 2003. In lieu of this, the PI will submit requests for REU supplements as well as the REU Site request. The PI has a long and established history of using undergraduate researchers through REU supplements. Recruitment of underrepresented peoples has been and will be a facet in the PIs research projects.
The technical merits of this project derive from its impact on (i) increase circuit speed due to shortened path lengths and increased functionality, (ii) reduce component count (more computational power per unit area), (iii) lower power consumption (fewer components per logic function), (iv) compact the layout using 3-D integration of tunnel diodes above/below transistors, and (v) extend RF wireless technology.
This NSF project investigated the inclusion of negative differential resistance (NDR) devices for augmented circuits in the CMOS scaling era and into the post-CMOS era. The materials science issues and tradeoffs considered for their synthesis as well as how each impacts overall NDR performance and was a component of this research. It also explored circuit opportunities for digital and radio frequency towards compact low-power memory and logic and energy-efficient mixed-signal circuits. Further, extreme challenges for ultra-scaled complementary metal–oxide semiconductor (CMOS), coupled with advances of NDR devices compatible with Si CMOS processing, are bringing NDR junctions back to the forefront and guiding the path toward steep subthreshold transistors. Since the development of the Esaki diode in 1958 based upon interband tunneling (Esaki, 1958), the tunnel diode has been an additional option for the circuit designer, with its unusual negative differential resistance (NDR) property. Its folded I-V characteristic facilitates such circuit elements as simple digital latches by the serial connection of two back-to-back tunnel diodes in the form of a Goto pair (Goto et al., 1960). The central node holds a high or a low voltage state with a restoring current. Multi-valued logic is also permissible with the placement of stacked NDR devices serially in one circuit branch creating a staircase of holding states. Additionally, the quantum tunneling phenomenon is a majority carrier effect that is not governed by conventional transit time effects. Therefore, NDR devices are ideally suited to reach terahertz frequencies where RF circuits capitalize upon the device’s high nonlinearity or its self-oscillatory behavior when biased in the NDR region. Historically, semiconductor microchips using tunnel diodes for digital circuits were first envisioned in the 1960’s following Esaki’s work and prior to the advancements in NMOS, and later CMOS, processing. However, the robust manufacturability of complex multi-device CMOS chips created the VLSI technology we know today and displaced the classic Esaki diode that is fashioned using a simple alloy process. Unfortunately, the lateral scaling of an alloy process does not translate well to a submicron technology. As a result, applications for tunnel diodes moved away from digital circuits and, instead, leveraged their unique properties for niche applications with RF and high-speed circuits, such as low power amplifiers; detector log video amplifier (DLVA), microwave and RF power monitors, high-frequency triggers, local oscillators, frequency locking circuits, and zero bias detectors. Tunnel diodes are also very radiation hard and have been used in space applications like amplifiers for satellite communications. But updated demands by the digital community are bringing NDR devices full circle. Extreme challenges for ultra-scaled CMOS as it reaches towards sub-32nm node coupled with advances of NDR devices compatible with Si CMOS processing are bringing NDR circuitry and tunneling junctions back to the forefront. This renewed attention towards inorganic NDR devices has also been a catapult for interest within the electroactive organic community and has fostered the field of molecular electronics and other bulk organic semiconductor NDR device topologies.
