Independent Component Analysis on Coarse-grain Reconfigurable VLSI (for sensor analysis and fusion) SUMMARY The goal of this SGER project is to conduct a one-year intensive study on inmapping the Independent Component Analysis (ICA) technique to a coarse-grain parallel-processing-chip architecture and the associated issues in design, fabrication and test of the corresponding VLSI chipls for networked sensors. However, several practical and fundamental issues, critical to the complete solution, will also be investigated. These include sensor calibration/validation, defect and fault tolerance through redundancy and reconfiguration, and signal interpolation in scenarios where the data rates from the various heterogeneous sensors are disparate. The urgency of this project arises from the fact that while sensor research is advancing rapidly, the extraction of information and fusion of multi-modal sensor data in real time is not keeping pace. To harness the full power of networked sensors, such processing capability, resident at the sensor nodes, is imperative. Broader Impacts: Intelligent sensor systems are of critical importance to the nations security and economic growth. Graduate students will be involved in this research, one or more of whom will be supported by the grant funds. Special effort will be made to recruit women, minority, or disabled students to fill these research positions. It is also useful to remark that the project will significantly benefit two graduate courses: a unique graduate course that is under development by the PI, namely Heterogeneous System on a Chip, which is aimed to fulfill a serious national need; and a Low Power VLSI Design course being developed by the Co-PI which has a project based learning component.
