The objective of this research is to harness the spin-stabilized, gigahertz-speed motion of a multi-walled carbon nanotube in a controlled and predictable way for memory-cell operation. The work explores the fundamental understanding of materials, behavior response and device design at the nanoscale level to roadmap and develop an innovative bottom-up technology that can serve as an alternative and complementary solution to silicon-based microelectronics. The approach involves the development of a mixed-chirality multiwall nanotube, with the inner tube oscillating at ultra-high speeds inside the sealed outer tube. The switchable ON/OFF states are defined by two distinct positions of the inner tube relative to the outer tube.
It is a well-known that Moore's Law governing transistor miniaturization cannot go on indefinitely. Many have predicted that it will reach physical limits around the year 2017. Clearly, this halt to top-down miniaturization of semiconductor microelectronics will have profound implications to US security and economic well-being. A radically different approach is required to meet the expected demand for computing power of the future; an approach based on a bottom-up fabrication of nanoelectronics, in which nanoscale building blocks such as molecules, atoms, etc. are employed. In principle, it is possible to fit a trillion molecular devices in an area of one square centimeter and thereby, achieving a significant extension of Moore's Law. The design as proposed here is a unique and innovative application of the carbon nanotube technology for fabricating a molecular-sized memory cell to overcome the physical limitation of the top-down miniaturization in semiconductor microelectronics.
