This exploratory research investigates the feasibility and applicability of the turbo principle to the design of reliable nanometer scale networks-on-chip. The turbo principle involves three main ideas-(1) cooperative encoding and decoding employing spatial, information, and temporal redundancy; (2) pseudo-random interleaving that spreads noise; (3) iterative estimation for reduced complexity and energy-efficiency. This research will examine hardware-amenable methods that embrace cooperation, interleaving, and iterative estimation jointly to improve reliability and better manage the increased wiring complexity resulting from on-chip integration of thousands of cores. Specific research tasks to be performed include (1) developing joint reliability and energy-efficiency metrics appropriate for networks-on-chip; (2) determining suitable interconnection topologies that optimize spatial redundancy; (3) investigating packet interleaving with proper organization of on-chip switches and routers to enable low-latency data aggregation at the nodes; (4) developing specific turbo-like encoding and decoding algorithms for near-optimal joint reliability and energy-efficiency. Broader Impact: This research will benefit both the nanoelectronics and emerging technologies communities, as physical interconnect and reliability are at the forefront of critical bottlenecks for ultra-large scale integration. The foundational knowledge acquired in this research will be disseminated to researchers and practitioners, accelerating research in networks-on-chip and multicore systems-on-chip, as well as other emerging nanoscale technologies. Results from this exploratory research will find direct application and synergy in a graduate level course developed by the PI, termed VLSI Error Control Systems. Further, this research will train one graduate student in a focused interdisciplinary study of networks-on-chip, information theory, communications, and integrated systems design. The PI is actively engaged in community outreach to local middle and high schools, working closely with teachers and principals to foster increased participation of underrepresented groups in science and engineering. An experimental workshop that explores methods for building entrepreneurship through innovations in systems reliability is planned with local high schools, encouraging participation, particularly from underrepresented groups. A rudimentary course on networks-on-chip will be jointly developed by the PI and some local high school teachers prior to participation in the workshops
