The program objective is to explore the growth, structure, optical and electronic transport properties of III-V patterned nanopillars formed on silicon substrate for potential novel electronic and optoelectronic applications. The pillar formation involves a hybrid approach which combines a lithographically patterned substrate and a catalyst layer using either molecular beam or metal organic vapour phase epitaxial techniques. The introduction of the catalyst enables highly crystalline pillar formation despite the 13% lattice-mismatch to the silicon substrate. This is a promising approach to integration of direct bandgap, high mobility III-V nanostructures into the CMOS platform.
The Intellectual merit of this proposal is the novel approach that will enable patterned selective growth of III-V nanopillars within a masked Si substrate, by manipulating the diffusion process of catalytic seeds on the substrates. In the end, a III-V vertical pillar based LED and photodetector on the same Si substrate will be fabricated, as a demonstration of the transformative concept of this heterogeneous integration of on-chip optical interconnect. The scientific outcomes will have applications in future high speed, low power electronic devices and on-chip opto-electronics.
The Broader impacts of this activity combines expertise and infrastructure from two universities in complementary areas of nanomaterials growth, characterization, patterning, device fabrication and modeling. The exposure and training of the next generation of scientists and engineers occurs through substantial involvement of graduate, undergraduate students, targeted toward the participation of underrepresented groups. Specific involvement of high school students during summer programs is planned for each year at UCLA and ASU.
