The objective of this research is to explore methods to improve the efficiency of carrier spin transport through ferromagnet/semiconductor device structures. The approach is to reduce the depletion region in a ferromagnet/semiconductor interface and tune the interface resistance-area product for achieving large spin transport for realizing practical devices. This approach is explored on technologically important semiconducting channels such as silicon, germanium and semiconductors with low-band-gap and large spin-orbit coupling.
Intellectual Merit: In order to design and fabricate high-performance semiconductor spintronic devices, a novel technique to tune the interface resistance of the ferromagnet/semiconductor tunnel contacts using a thin layer of non-magnetic, low-work-function layer is explored. This approach allows exploration of suitable low-work-function materials for manipulating interface properties and novel device designs to achieve efficient semiconductor-based spin electronics.
Broader Impacts: This research will establish a new direction with significant impact on the field of spin electronics and thus make possible new generations of novel devices with multi-functionalities. The advantages of spin-based devices include low power consumption, high storage density and transistors with low leakage currents and switching energies. The integrated educational and outreach component of this research will provide novel content for new courses in nanotechnology, hands-on learning opportunities for undergraduate and graduate students as well as District of Columbia high school students and teachers, especially for the large population of minority and under-represented students. This program also covers diverse aspects of science and engineering including semiconductor processing, device design and fabrication and ultra-high vacuum techniques that are essential for a technology-based economy.
