The objective of this research is to revolutionize the digital-signal-processing (DSP) technology used for many-channel electrophysiological recording systems used in both clinical and neuroscientific applications. The approach is to provide tight interaction between algorithms and the underlying technology to optimize the DSP architecture. The goal is to demonstrate improvements of several orders of magnitude in the increased number of channels and decreased hardware cost.
With respect to intellectual merit, this project intends to demonstrate a real-time implantable DSP chip scalable up to 2,000 neural channels. Existing designs provide partial DSP functionality for only up to 30 channels. The chip will be able to isolate activity from individual neurons and reduce the data rate below 800 kbps while maintaining a power density less than 0.8 milliwatts per square millimeter, as needed for safety. The project will also provide a DSP architecture for hardware emulation to demonstrate over a 10,000 times speed-up in data processing compared to state-of-the-art computers.
With respect to broader impact, a successful integration of neural-data processing will significantly advance many applications such as visual, auditory, motor, and cognitive prosthetics. Methods for achieving faster analysis of electrophysiological data will provide neuroscientists quicker access to important research data and improve the overall quality of living. The program intends to train a diverse population of students for careers in industry and academia through relevant and practical design projects, and promote a wider public access to the latest research and educational tools. The far-reaching social and economic impact will be to help sustain the spread and evolution of information technology to new biological and medical applications.
