The objective of this research is to demonstrate ultra-low-power-dissipating complementary logic prototype built upon on-chip directly assembled 2-D graphitic platform, towards achieving all-carbon electronics without involvement of scientific handyman methods. The approach is to use highly-adaptive material and device scheme to implement complementary logic configuration, combined with an innovative strategy to integrate chemical assembly into carbon circuit fabrication.
Intellectual Merits: The proposed research is the first effort to demonstrate graphene complementary logic, addressing challenges towards carbon-based information processing. The research is based on innovations at several levels: (1) on-chip direct assembly and monolithic integration of patterned graphene platform, (2) employing electronically flexible, highly adaptive bilayer graphene for both switch and interconnect, (3) graphene CVD growth on ultra-thin metal catalyst, (3) implementation of complementary-channel logic switches, and (4) a versatile, seamlessly integrated carbon fabrication strategy.
Broader Impacts: If successful, the research would breakthrough key identified barriers towards manufacturing-worthy carbon integrated circuits, challenging the silicon dominance. The research would make far-reaching ideas in electronics, directing the field toward a new transformative technology. From a broader view, the proposed integrated carbon fabrication platform may have impacts on a spectrum of potential applications, as well as heterogeneous integration of multiple functionalities. The research opens opportunities for students to acquire multidisciplinary experience in devices, circuits, materials, and nanofabrication. Outreach efforts will broaden participation of under-represented groups in research programs. The dissemination of research discoveries by publications and its inclusion in new curriculum development will ensure broad impacts to scientific, educational, and general public community.
The objective of the NSF-supported project is to develop a chemical synthesis process for graphene nanosheet on designated substrate with desired material features, and use the material platform to demonstrate electronic device prototypes. During the project period, effort has been made to develop growth process for direct assembling few-to-monolayer graphene on insulating substrate. Material characterization has been performed on the prepared samples using metrology tools (SEM, Raman, AFM, XPS, TEM, etc.) to acquire composition, morphology, layer configuration, defectivity, and other key material information. We continued to develop layer-transferring process to assemble graphene-based heterostructures, and conducted study of carrier transport behaviors in graphene nanosheets. Training in material growth, material analysis, and nanofabrication tools has provided the participating student with hands-on lab experience. The research has generated scientific understanding on synthesis process and material properties of carbon nanostructures that offer unique physical, electrical, and thermal properties. While the research contributed to the advancement of knowledge in nanoscale science and engineering, the results could be potentially valuable in developing a new material for information processing in the "post-silicon" era, replacing silicon-based technology which is approaching its scaling limits. Graphene nanostructures could potentially impact applications in information processing and communication. The research may contribute to the implementation of future-generation electronics and cost-effective manufacturing based on bottom-up chemical assembly.
