The objective of the research is to reduce the power consumption of wireless transmitters by improving power amplifier (PA) efficiency. The approach is to use dynamic reconfiguration of power amplifier circuit components in conjunction with sophisticated digital signal processing algorithms to ensure that power efficiency does not degrade significantly while generating modulated radio frequency signals.
The intellectual merit of the research is that it presents a promising, radically different approach that recognizes the need to employ digital signal processing techniques to solve longstanding problems in power amplifier design. Realization of digital signal processing techniques in power amplifier design allows the creation of architectures that operate the power amplifier always in near optimum efficiency mode. The attendant dynamic range limitations are overcome by using signal processing algorithms. The approach is very suitable for monolithic integration in very fine fabrication processes.
The broader impacts of the project are at least three fold. First, the research activity addresses the problem of building power efficient wireless transmitters that is crucial to the growth of communication systems in particular and the electronics industry in general. Second, reducing wireless radio power consumption contributes to the growing efforts to lowering our energy footprint. Third, the research activity will be useful in training future circuit designers in the fundamental interplay between circuit design, signal processing, and electromagnetics, thereby preparing them to better face the immediate challenges of circuit design, and to adapt to the impending evolution of integrated circuits from microelectronics into newer technologies.
The objective of this project was to reduce the power consumption of wireless transmitters by improving the efficiency of power amplifier (PA) circuits. Power amplifiers are one of the most power hungry components in wireless transmitters. Deacdes of research has resulted in several power amplifier circuits and architectures that exhibit high efficiency at peak output power level, but efficiency invariably degrades when operating at lower ("backed-off") output power levels. Since modern wireless transmitters operate mostly at "backed-off" power levels, average efficiency remains woefully low. This project developed techniques that improve the efficiency of a class of power amplifiers even when operating below peak power. It was found that dynamically reconfiguring the components of the power amplifier according to desired output power level minimizes efficiency degradation with "back-off". Essentially, the power amplifier is always operated on or close to high efficiency contours in its parameter space. Over the course of the project, power amplifier circuits and architectures based on the aforementioned dynamic reconfiguration principle were developed. Sophisticated digital signal processing algorithms such as digital pre-distortion are employed to overcome linearity problems associated with the developed technique. The technique was theoretically analyzed and furthermore, verified using discrete and monolithic prototype power amplifiers. In particular, measurements of the monolithic hardware prototype demonstrate best-in-class average efficiency among power amplifiers targeting commercial cellular communications standards such as WCDMA and LTE. Over the course of the project, four graduate students and one postdoctoal scholar were trained in the latest in power amplifier design and the increasing role of signal processing in it. Research formed the bulk of at least one PhD dissertation. Findings and insights gleaned from the project were made accessible to the technical community in the form of multiple publications in premier IEEE journals and conferences and invited talks.
