Intellectual Merit: The purpose of the proposed research is to design, fabricate and characterize novel nanowire broken-gap tunneling field-effect transistors (NW BG-TFETs), devices that have the potential to substantially reduce power in computational systems by simultaneously achieving sub-60-mV/decade subthreshold slope and drive currents comparable to MOSFETs. The proposed work has strong intellectual merit as it addresses a critical problem for future CMOS scaling, which is how to reduce logic power consumption. It does so by exploring a new device concept, the NW BG-TFET that has not yet been experimentally explored. In particular, project intends to provide a thorough understanding of all aspects of the device design and operation, including the influence of interface states and trap-assisted tunneling, mechanisms that must be fully understood if this new device is to function as intended. Broader Impact: The proposed project could have substantial benefits for understanding the role of surface-mediated transport in TFETs and nanometer-scale devices in general. It also provides an ideal training ground for graduate students, in that the industrial collaboration allows students to obtain direct industry interactions that will better allow them to understand the real world applications of their research endeavors. The project also offers an opportunity for classroom education, as the device provides an ideal example of the factors that affect and ultimately limit CMOS scaling. Finally, K-12 educational outreach activities are tightly integrated into this work, and this project provides numerous opportunities for demonstrations of nanotechnology that can generate excitement about engineering and scientific careers in general.
