Electron-Beam Direct-Write microlithography systems use an array of electron beams to write a mask image on a photo-resist coated wafer. They are attractive for Next-Generation Lithography because they are able to produce circuits with much smaller features than conventional hotolithography systems which need expensive physical masks, but they currently have the disadvantage of being much slower than physical mask lithography systems. The objective of this project is to develop specially designed data compression algorithms for the huge electronically controlled mask images of electron-beam direct-write lithography systems in order to speed up and improve such systems. The problem of layout image compression differs from the majority of work on image compression, which targets "natural" images, because there are (1) severe constraints on the decoder, (2) complications in the extraction of patterns, and (3) special structures within layout images to be exploited.
Intellectual merit: The intellectual merit is the development of circuit layout image compression algorithms and implementations which are wellsuited to the requirements of evolving electron-beam direct-write lithography systems including existing promising massively parallel pixel projection maskless lithography systems which use various writing strategies.
Broader impacts: Microelectronic circuits directly impact the speed and efficiency of many information technology systems including signal and media processing, aerospace, and defense. The transformative nature of the project is that it addresses the critical problem of data delivery which currently limits the viability of electron-beam direct-write lithography systems and canthereby profoundly affect the future manufacturing of integrated circuits.
