Digital computers built with traditional electronic devices based on conventional architecture are ubiquitous in our daily lives. However, they are not able to keep up with the increasing demand for energy efficiency for data-intensive tasks, e.g., video streaming, because of intrinsic limitations. Memristor, a novel device whose resistance depends on their electrical history, has been proved to be able to overcome or avoid some of the limitations by performing computing at the same location where data is stored. With only one type of memristor, however, the demonstrated systems to date lack real-time learning capability in the hardware, which is required for both spatial and temporal information processing. The proposed project will develop a fundamentally new hardware system that integrates two different types of memristors and supporting circuits into three-dimensional (3D) networks. The new computing platform is expected to be more versatile, more compact, and more power efficient. The proposed research will lead to transformative hardware and technologies, contribute to the training of the nation’s high-caliber workforce, and hence reclaim the competitiveness and leadership of the IC industry of the U.S. The proposed project will be also integrated with STEM education through classroom teaching, summer camp for community college teachers, K-12 students, with the full participation of women and underrepresented minorities.
The proposed project aims at experimentally implementing 3D memristor-based neural networks for real-time machine learning with high energy-speed efficiency. The specific objectives towards this goal are as follows: (1) to design and fabricate high-density nanoscale 3D-stacked passive arrays for parallel convolution operations for spatial feature extraction; (2) to enable reservoir computing with novel diffusive memristors in order to extract temporal patterns; (3) to develop learning algorithms co-designed with the hardware; and (4) to design and build an integrated system on printed circuit boards that physically integrates the 3D-stacked kernels, the diffusive memristor dynamic reservoir, the fully connected layer, and the auxiliary digital circuits for real-time video processing and classification. The success of the proposed work will not only provide an energy-area efficient hardware system with custom-tailored algorithms and software to realize real-time machine learning, more importantly, but it will also provide solutions to the biggest obstacles that hinder the processing-in-memory. This system could deliver a large computing throughput with small operating power and compact system size. More importantly, the pretrained convolution kernels and fixed connections of the dynamic reservoir could substantially reduce the training complexity, rendering the system suitable for real-time learning tasks like video classification with hardware learning circuits combined with co-designed algorithms and software.
This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
