This project combines analog circuit design and CAD to produce digital circuits that can operate at substantially reduced voltages, which will result in lower power consumption. The project has introduced the QuadRail logic family, which allows voltage control of transistor thresholds to maintain constant logic thresholds. Use of this family permits lower supply voltages because of the tighter control of device thresholds. However, use of this family requires optimization of individual digital cells, new device layout methods, and new strategies for floorplanning, placement, and routing. The research in this project is exploring all of these optimization areas, and is producing a battery powered demonstration system for speech signal processing.