This Small Business Innovation Program (SBIR) Phase I project commercializes a technology that reduces the energy consumption in digital electronics on average by a factor of three. The solution applies across the complete semiconductor marketplace. The power advantages are derived based on designing multi-synchronous digital electronics. A next generation design flow is developed for multi-synchronous systems based on a novel method called relative timing. Relative timing enables the application of the standard single clock frequency Electronic Design Automation (EDA) tools and flows to be seamlessly applied to the design of multiple timing domains in a single digital integrated circuit. No modifications to the standard cell libraries are required. Some additional EDA is necessary to support the extended concurrency and synchronization provided by additional multi-synchronous circuit Intellectual Property (IP) primitives. These IP blocks enable lower power, reduced area, and higher performance than single frequency designs. Timing constraints in these multi-synchronous systems are based on formal verification and therefore are proven correct and complete. System design productivity is enhanced due to design modularity. This project validates the method by developing a product-ready semiconductor design that demonstrates a significant competitive advantage in power, area, and performance against a traditional single frequency design.
The broader impact/commercial potential of this project addresses the need for reduced energy consumption in digital electronics and is rooted in the exponential growth in transistors on integrated circuits. Previously, as designs became power limited, new transistor technologies were introduced. Each logic family provided lower power and better performance. No new transistor technology is on the horizon, making design contributions to energy efficiency critical. The localized efficiency of multi-synchronous design is one of very few design methods that provide significant energy reduction. Successful commercialization will result in this technology being applied across the semiconductor industry to products ranging from performance cloud compute servers to medical electronics and sensors. Industry wide growth will occur through EDA and custom circuit IP products that enable the development of multi-synchronous architectures. Open market and strategic partnerships with world class semiconductor companies for training, consulting, and early product development will reduce early risk and develop market acceptance. Ultra-low power medical applications such as digital hearing aid devices particularly benefit from multi-synchronous technology. Increased battery life reduces product cost and improves the quality of life for seniors and the disabled. Similarly, ultra-low power biomedical wireless sensors likewise provide societal benefit.
This Small Business Innovation Research Phase I project is based on Granite Mountain Technologies (GMT) novel "Relative Timing" technology that reduces the energy in digital integrated circuit systems to an an average of one-third that of current technology. Electronics are increasingly important to all aspects of our lives including business, communication, medicine, and entertainment. The energy footprint of electronics has commensurately increased with its expanded usage and importance in society. For example, the energy consumption of data center servers in the U.S. doubled from 2000 to 2005, consuming 2% of the total U.S. electric output. GMT's breakthrough technology allows power reductions in nearly every application of digital electronics, from compute servers in data centers down to handheld devices such as cell phones and home electronics. GMT has demonstrated the technology in test chips that include microprocessors, digital signal processing chips, network-on-chip designs, as well as system on chip building block components. The NSF Phase I funding enabled GMT to develop a low power prototype of a commercial product. The grant enabled GMT to work with a worldwide semiconductor manufacturer to translate one of their current commercial mixed signal products to evaluate the benefit and compatibility with current design and manufacturing tools and flows. Using GMT's relative timing technology, the power in this product was reduced by a factor of 3.3 times over the current commercial design. Phase II funding of this project will enable the maturation of the technology and facilitate full production of energy reduced commercial electronics. The next generation of the mixed signal product designed in Phase I will be implemented for production level product in Phase II.
