The research will develop a thin-film integrated capacitor structure that incorporates an insulator with a very high dielectric constant. This can have important application to high- density computer memory chips with elements on the micron and submicron scale. In its rutile crystalline form, titanium dioxide exhibits a dielectric constant greater than 100, which corresponds to a capacitance of 1 microfarad per square centimeter for a 100 nm dielectric layer. This can be integrated together with TiN electrodes, so that the entire TiN/TiO2/TiN trilayer structure can be prepared simply by reactive sputtering from a single Ti metallic target in appropriate atmospheres. Since TiN is also a well-known diffusion barrier in silicon technology, it will prevent interaction with other materials during processing steps. This trilayer can then be patterned using ion etching to isolate the various capacitors on the chip. The work will optimize the process for manufacturing these capacitors on large-area Si wafers, demonstrate their reliability, and to develop improved deposition equipment that incorporates these processes into integrated circuit manufacturing technology.
