9403476 Jannson This Small Business Innovation Research (SBIR) Phase II project develops a prototype polymer-based optical bus (POB) for the shared memory architecture of high speed data acquisition systemq. Key POB elements were fabricated and tested successfully in Phase I. The optical power budget is below 20 dB, which is a low loss for greater than 50 boards. The electrical power budget is around 5 watts. Based on an innovative optical backplane architecture, the POB system, along with a new high speed bus protocol, is automatically adaptable for high speed, high volume memory data acquisition systems and to standard electrical bus architectures. Advantages of POB are: maximum data rates great than 100 gigabits per second; a large number of boards; and one-order-of-magnitude larger inherent backplane propagation speeds. The POB shared memory architecture has potential for a new generation of distributed computing systems for application in a wide range of physical measurements as well as in PCs and work stations. It can also be applied in optical analog to electrical data buses but at much higher speeds than presently possible.
