Amorphous and polycrystalline silicon thin-film transistors (TFTs) have been used to integrate peripheral drive circuits with active matrix flat panel Liquid Crystal Displays (LCDs) on large area quartz or glass substrates. However, conventional TFT manufacturing techniques, based on high temperature chemical vapor deposition (CVD) processes, necessitate expensive, thermally durable substrates such as quartz. It is therefore desirable to develop lower temperature TFT manufacturing processes which permit use of less expensive glass substrates. In this SBIR Phase I project a patented, pollution-free Jet Vapor Deposition (JVD) process is utilized to fabricate high quality amorphous and polysilicon TFTs at lower temperature, lower cost, and higher throughput. JVD's novel vapor source, a sonic jet in a low-vacuum fast flow, rapidly transports condensable atomic or molecular vapor to cool substrates. Using of the JVD technique, the grantee's firm makes five key submicron layers for TFTs: 1) high quality indium-oxide layer as transparent gate electrode; 2) high quality silicon nitride as gate dielectric layer; 3) intrinsic amorphous and poly-silicon; 4) doped amorphous and poly-silicon (n+ type); and 5) aluminum electrodes. In Phase I, focus on JVD deposition of amorphous and poly-Si. In principle, these semiconductor films can be deposited in sequence in the same chamber as the JVD silicon nitride dielectric layer (integrated processing). The research is to design, fabricate and characterize TFTs on glass substrates. Phase II is expected to optimized JVD processes and materials for low cost, high volume manufacture of TFTs for flat panel displays. A complete prototype TFT display fabricated with JVD techniques anticipated in Phase II; such demonstration will lay a solid groundwork for Phase II commercialization.
