This project studies how to best utilize the resources available in modern processors in the development of database system software. A primary objective is avoiding cache interference between threads in multithreaded and multi-core processors, so that performance scales well as the number of cores/threads increases. A variety of techniques are considered, including multi-threaded algorithm design, threads explicitly devoted to resource management, and scheduling algorithms that are aware of thread interference patterns. Simulations and implementations on real hardware are used to measure the effectiveness of each approach.
The project will result in the development of algorithms designed for the global management (and minimization) of processor- and memory-related delays in database systems. Based on preliminary experiments, overall improvements in throughput of thirty to fifty percent are expected. A database prototype will be developed, and made available for download over the web.
This project has relevance to commercial and public-domain database systems. Performance improvements would enhance the experience of database system users, and reduce hardware requirements for a given level of performance. This project makes significant contributions to education through reseach projects, a new advanced course, and by providing a prototype system for use by others.
Project-related information can be found at www.cs.columbia.edu/~kar/fastqueryproj.html
