This Grant Opportunity for Academic Liaison with Industry (GOALI) award provides funding for the development of an algorithm to aid in the design of manufacturing facilities for increased competitiveness. The layout algorithm will determine the best placement of departments within a manufacturing facility to provide the most efficient material flow. The algorithm uses design techniques from very large-scale integrated (VLSI) circuit design, where thousands of modules are placed on a computer chip to minimize the size of the chip. A continuous-based department representation and mixed-integer programming facility layout model is combined with a sequence-pair structure from VLSI design. Fixed departments, department shape restrictions, and material handling aisle networks will be additional problem aspects considered in the developed algorithm. After the layout algorithm is developed, it will be tested on problems from the research literature, as well as data from an industrial collaborator. If successful, the results from this research will lead to improvements in the design of manufacturing facilities since the facility layout is the cornerstone of facilities planning, and facilities planning provides the substrate upon which the manufacturing system resides. Expected improvements would be in terms of lower material handling costs, reduced work-in-process, reduced manufacturing lead times, and improved product quality to enhance the competitiveness of the manufacturing enterprise. These improvements will be realized through the ability to solve larger problems that can be solved now, as well as providing better solutions to problems that are presently solved sub-optimally. This work will also likely lead to ideas from facilities planning being transferred to VLSI design, with possible impacts on that industry as well.