The need for more cost-effective, flexible, and convenient high-performance computing is a common thread across diverse areas of Bioinfomatics and Computational Biology. We propose to address this problem by augmenting PCs with low-cost, FPGA-based, computational coprocessors; that is, with plug-in boards similar in cost and ease of use to graphics cards. The proposed hardware consists of mainstream commodity components. The key technology to be developed is the software environment, which will completely hide the underlying hardware not only from users, but also from most application developers. The projected deliverable is a factor of 100 to 1000 speed-up over a PC for a wide variety of applications, together with an environment for the creation of new applications by ordinary programmers. To compare the proposed system with current alternatives: PCs are not very powerful; small clusters are neither very powerful, nor easy to use; large clusters and supercomputers are very expensive and hard to use; and specialized hardware is expensive, inflexible, and has limited applicability. The basic innovation is the use of FPGAs to accelerate broad-based user-definable applications. The technical innovation is based on two factors: the field programmability of the circuits and the commonality of characteristics within families of computations. These enable a system based on templates and callable libraries, giving the user access to efficient hardware designs without requiring hardware knowledge. The expected broad impact is a qualitative increase in computing capability available at the desktop. The longer term may see a similar increase with respect to PC clusters. Specific areas of applicability are not only sequence processing, but also microarray data analysis, modeling molecular interactions, modeling genetic networks, and many others.
| Sukhwani, B; Herbordt, M C (2010) FPGA acceleration of rigid-molecule docking codes. IET Comput Digit Tech 4:184-195 |
| Herbordt, Martin C; Model, Josh; Sukhwani, Bharat et al. (2007) Single Pass Streaming BLAST on FPGAs. Parallel Comput 33:741-756 |
