Software programs executing on a broad range of internet systems are constantly subject to malicious attacks in various forms. Program execution behavior might be altered as a result causing substantial damage, data may become corrupted and privacy can be greatly compromised.

The objective is to develop a secure processor model which secure applications can easily be built on. The proposed designs can protect the privacy of the processor owner through diversifying the representation of its identity.

Intellectual Merit To achieve our goals, we will augment the existing microprocessor architecture to incorporate new features. The proposed architectural components address a broad range of attacks on uniprocessor and multiprocessor architectures. In particular, we will develop novel techniques as follows. Architecture Support for Enhancing Uniprocessor Security. The confidentiality and integrity of such a microarchitecture are maintained through encryption and decryption of the code and data transferred across the chip. While the efficiency of encryption has been solved successfully by PIs and others, the computation intensive nature of crypto operations has led the verification of inbound traffic being delayed. Such delay imposes vulnerability as one can peek critical data on-chip during this time. This project designs a strong verification engine with which information leakage of on-chip data is prevented,

Broader Impact Accomplishing the proposed research objectives can significantly impact the research community, processor industry, and academic education. The secure processor model in this proposal is a reliable computing base on which higher levels of secure systems may be built. Since applications are encrypted differently, OS security and user application security are separated. Compromising the OS does not necessarily weaken the user program or data. Higher levels security protocols can thus take advantage of the secure architectural components. Techniques proposed in this proposal are also very practical. Many of them are ready to be synthesized and integrated into real processors.

The education component in this proposal seeks to better prepare the students for the coming challenges in computer system design. The research projects included in this proposal offer the students great opportunities in terms of class projects, Master or Doctoral theses, and other valuable practical experience.

Agency
National Science Foundation (NSF)
Institute
Division of Computer and Communication Foundations (CCF)
Type
Standard Grant (Standard)
Application #
0430021
Program Officer
Almadena Y. Chtchelkanova
Project Start
Project End
Budget Start
2004-11-01
Budget End
2006-10-31
Support Year
Fiscal Year
2004
Total Cost
$54,001
Indirect Cost
Name
University of California Riverside
Department
Type
DUNS #
City
Riverside
State
CA
Country
United States
Zip Code
92521