"This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."
Many emerging and future electronics applications require large amounts of digital signal processing, and operate with very limited power budgets. Examples include: many types of wireless communications, medical imaging such as ultrasound, sensor networks, and portable multimedia devices. A very promising solution for the processing of these workloads is a single-chip platform containing one thousand or more simple and highly-efficient programmable processors. The goals of this project are to: develop architectural hardware concepts and software tools that enable high-performance and energy-efficient computational platforms, introduce results into several courses at UC Davis, and make results and tools widely and easily available to other researchers.
In particular, the project goals will be achieved by exploring: 1) novel inter-processor connection topologies and processor shapes, 2) new algorithms for mapping large collections of software tasks onto processor arrays, 3) specialized hardware processors for common tasks, and 4) architectures for efficient shared and configurable memories. The PIs are active in several campus-wide and national organizations that work to attract and retain members of under-represented groups to engage in research and complete graduate degrees in science and engineering. Research effort and results will be instrumental in the cross-disciplinary training of future scientists and engineers in the design of massive processing arrays.
