Over the past decade, intense research has focused on the development of a universal quantum computer. Such a device promises to enable the solution of large-scale problems that cannot be addressed using other techniques. Applications include factoring large numbers (useful for cryptography), searching large databases, and simulating physical systems at the quantum mechanical level (e.g., for drug design). A quantum computer exploits quantum mechanical phenomena to perform calculations. Its fundamental building block is the qubit, or quantum bit. The power in a quantum computer lies in its ability to operate in a parallel manner; with every additional qubit added, the computational power doubles. Because of this property, a quantum computer with just 300 ideal qubits could manipulate a data set that has more elements than there are electrons in the universe! However, the best available qubits are currently far from ideal and projections indicate that a quantum processor built with these imperfect devices will require millions of qubits to achieve the level of performance described above. One of the major challenges associated with scaling contemporary systems to this level lies in the complexity associated with the interface between the quantum processor and a standard computer. The central goal of this project is to explore the use of silicon integrated circuit technology to redesign this interface in such a way that it is amenable to scaling. The ability to scale the number of qubits from 100 qubits to millions of qubits is expected to make a significant impact in science and engineering. In addition to the technical goals of this project, a number of educational goals are being pursued. These items include curriculum development, undergraduate and graduate student research opportunities, trips to scientific research centers, and outreach to K-12 educators.
This project focuses on the control and readout of superconducting transmon qubits. Such superconducting artificial atoms are a particularly attractive choice for use in a large-scale quantum computer due to the fact that they can be engineered at the circuit level and constructed using the standard lithographic techniques. However, it is necessary to protect these devices from environmental noise by cooling them below 0.05 Kelvin. Today, control and readout is carried out using racks of room temperature equipment, connected to the quantum processor through bulky coaxial cables. To enable scaling from systems with less than 100 qubits to the million-qubit level, the classical/quantum interface must be integrated in the refrigerator and in close proximity to the quantum processor. To prevent heating of the cryogenic system, the power consumption of the control and readout electronics must be pushed towards the fundamental limits. The objective of the proposed project is to demonstrate the scalability and efficacy of a prototype quantum control and measurement system that is of low enough energy consumption that it may be placed near the quantum processor. The project consists of three inter-related efforts. First, waveform generators appropriate for controlling transmon qubits will be investigated. These devices will be optimized for energy consumption and gate fidelity. Second, an integrated circuit receiver appropriate for qubit readout will be developed. Both the readout and control circuits will be implemented in SiGe BiCMOS technology, owing to its cryogenic low noise and low power capabilities. Finally, these two devices will be tested with qubits and the gate/readout fidelity will be reported. Integrated cryogenic electronics are believed to be essential to enable the manipulation and readout of future fault-tolerant quantum processors; as such, the development of this new technology is expected to greatly advance the field of quantum computing.
This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
