Current practice in developing programs for automated manufacturing leads to code that is difficult to develop, debug, and maintain. Discrete event system (DES) control synthesis techniques promise to automate this control development using analysis of system models. However, many current DES techniques cannot be used for moderate or large systems because they explicitely rely on analysis of the state space which sufffers from state explosion. Moreover, they require heavy investment in modeling due to an inability to reuse plug-and-play component models, and they assume unambiguous control specifications that are as detailed or are more detailed than the control sequences that would have to be developed for a manually coded control. For DES control synthesis to find use in industry for manufacturing control requires the development of techniques that critically address the limitations of current techniques. In this proposal, we outline a research program for developing an integrated set of tools and techniques that directly target the application of automated model-based DES control synthesis to control of manufacturing systems. The resulting techniques will be implemented together in an integrated software tool for demonstrating the use of control synthesis to industries
The control approach we propose will allow a user to assemble a system model using plug-and-play discrete-state component models that have well defined input and output structures. The user then will enter high-level, ambiguous specifications of desired system behavior. The control synthesis methods will use analysis of the system model to convert this specification into a controller that contains complete information on the control sequences necessary to achieve the specification while avoiding deadlock conditions. The controller also will include fault detection and diagnosis information derived from the cause-and-effect relationships in the system model. The size of the controller will be kept modest by the use of a library of reusable, automatically synthesized segments of control sequences. The resultant control structure will be then automatically converted into C code or ladder logic code for compilation and execution.
The research issues that will be addressed in the development of these techniques include the conversion of ambiguous specifications into unambiguous hierarchical structures of control sequences, the efficient control of synthesized heirarchical control components, the use of supervisory control to prevent deadlock and prevent contradictory control actions from these control sequences, the use of incomplete observation information in the control, and the incorporation into the controller of fault detection and diagnosis information derived from the system model. ***
