This Small Business Technology Transfer (STTR) Phase I Project investigates the design of a data-center functionality off-load engine (DCFOE) based on a field-programmable gate array (FPGA)-based accelerator to off load common data center services. This DCFOE engine is intended to interact with both the host system running existing data-center applications, as well as existing network interconnects such as InfiniBand, 10-Gigabit Ethernet, to not only utilize their capabilities, but also to supplement them with more advanced communication as well as application relevant features that are not available currently. During this research project, feasibility studies of this unique design are planned by emulating the behavior of the DCFOE using software approaches; using a dedicated core of multi-core systems; as well as software-hardware hybrid approaches. The proposed technology transfer and product will lead to significant performance enhancements for next generation data centers.
Scientists, engineers and researchers from many different fields such as science, engineering, medicine, banking, rely on data centers and novel services to store, access and manipulate terabytes of data. This STTR research project will lead to a unique product in the market which can be used by the next-generation data centers to provide scalability and high performance. Such a product will be very useful for large-scale data centers being deployed at research laboratories. The general public, the federal government, industry, and universities would benefit from the outcomes of this research project.
