ABSTRACT Proposal: Planning Grant for an Industry/University Cooperative Research Center for Si Wafer Defect Engineering at North Carolina State University Principal Investigator: George A. Rozgonyi, NCSU Program Officer: Cheryl Cathey Date: 10 March 1997 Silicon wafers are the foundation for building integrated circuits. In order to be competitive in the integrated circuit industry, silicon chip manufacturers must continually strive to decrease the feature size of the components of the integrated circuits. A smaller feature size enables the chip manufacturers to both make smaller chips, fulfilling the market demand for ever smaller electronics, and to increase the yield of chips per silicon wafer, decreasing the cost per chip. In order to ensure high quality chips in high yields, the base material, the silicon wafer, must be as free from bulk and surface defects and imperfections as possible. This proposed Center would work with the silicon wafer manufacturers to: * provide a mechanism for the research issues of the wafer manufacturing community to be identified and addressed by the academic community, * educate graduate and post-graduate students to become effective members of the wafer manufacturing research community, and * provide a administrative infrastructure to enable funding of a large scale wafer defect research center. The Center's research would be organized into three thrusts: bulk defects and imperfections, surface defects and imperfections, and cross-cutting areas such as metrology and simulation. The bulk defects and imperfections thrust would involve research on control of the nucleation, growth, motion and annihilation of silicon crystals. The surface defect thrust would investigate methods to control and engineer the wafer surface properties. The cross cutting areas thrust would focus on metrology development and fundamental knowledge underlying metrology tools. The Center would have Dr. George Rozgonyi of North Carolina State University and Ro bert Helms of Stanford University as co-Directors, and would involve researchers from the University of Arizona, Arizona State University, the University of South Florida, MIT, and Berkeley. There are currently six wafer manufacturing companies that are willing to pay $50,000 per year to be part of the Center. With the research expertise resident at the seven universities, this Center would aid the wafer suppliers in improving their silicon wafer quality, thus enabling them to better meet the market requirements of their customers, the silicon chip makers. The chip makers would then be able to product smaller, cheaper devices, making them more competitive in the electronics marketplace.
