This research explores test methods for manufacturing test of CMOS integrated circuit (IC) chips based on monitoring of the dynamic portion of the power supply current (iDDT). Since an iDDT pulse is created any time a CMOS circuit switches states, the monitoring of iDDT provides observability into the switching behavior of the circuit. This, combined with standard test methods, can provide improved testability of manufactured IC chips. New accurate fault models based on actual physical tests as opposed to simulation alone, and new design methods for enhancing iDDT-testability are being investigated. The methods are being incorporated into a design-for-testability tool, and are being evaluated on real designs.
